Hollister Simulation of 32-bit parallel addition and subtraction VC
时间:2011-06-11 来源:loofksn2ki
32 -bit parallel addition and subtraction simulation VC
design is completed the main elements :
Agent and MAS review the relevant theory ,MBT italia EJB reporting system design research pr, research status, development trends and existing Issues ;
master C + + programming theory , understand class inheritance feature of the package ;
written arithmetic procedures and integration into the agent properties ;
and run the debugger displays the correct results.
current computer is 32 bit machines generally , data processing, the size of the range is limited,Abercrombie and Fitch, for solving similar to 29100 , or thousands of bits of the value of arithmetic problems, using the traditional calculation Is very difficult or impossible to solve the . As we all know , we can achieve with a finite automaton addition and subtraction between 0-9 , if the n -bit addition and subtraction between the data , a finite automaton with n respectively corresponding bit computing , and between the adjacent bit Carry or borrow operations can be achieved between the data in any calculation of the median , and range from the size of the machine processing of data limitations . Agent a calculation equivalent to a finite automaton , it can be used in series and parallel multiple Agent to complete the function of a Turing machine .
In this paper, based on multi- Agent theory,Hollister, design and implementation of a 32-bit parallel addition and subtraction , this method can be extended to any four -bit parallel arithmetic unit . Chapter 2 describes the simulation and simulation of intelligent , Chapter 3 introduces the theory of multi- Agent Systems , Chapter 4 describes the simulation of this specific design .