memory address segment hardwear unit part1
时间:2005-11-02 来源:redog
I want to improve my poor english, so now reading an english book,and making an english note! The book is Understanding the linux kernel.
Memory Addressing
Distinguish among three kinds of address:
Logical Address
Included in the machine language instructions to specify the address of an operand or of an instruction
This type of address embodies the well-known intel segmented architecture that force MS-DOS and windows
programmers to divide their programs into segments each logical address consists of a segment and an offset
that denotes the distance from the start of the segment to the actual address.
Linear address
A signal 32-bit unsigned integer that can be used to address up to 4GB,that is ,up to 4,294,967,296memory cells
Linear address are usually represented in hexadecimal notation; their values range from 0x00000000to 0xffffffff
Physical address
Used to address memory cells included in memory chips . they correpond to the electrial signals sent along the
address pins of the microprocessor to the memory bus Physical addresses are representd as 32-bit unsigned integers.
CPU control unit transforms a logical address into a linner address by means of a hardware
circuit called a segmentation unit .transfrom linear address into physical address by means fo
a hardware circuit called paging unit.
Here we focus our attentionn on Protected Mode
segmentation registers
A logical address consists of two part: a segment identifer and an offset that specifies the relative
address within the segment .The segment identifer is a 16-bit field called Segment Selector ,while the
offset is a 32-bit field.
six segmentation registers
cs The code segment register,which points to a segment containing program instruction.
ss The stact segment register, which points to a segment containing the current program stack
ds The data segment register ,which points to a segment containging static and external data.
the cd register has anothere important function :it includes a 2-bit filed that specifies the
Current Privilege Level of the CPU. The value denotes the highest privilege level, while the values 3
denotes the lowest ont linux user only levels and 3 which are respectively called Kernel Mode and User Mode.
Segment Descriptors
Each segment is represented by an 8-byte Segment Descriptor that describes the segment characteristics .
Segment Descriptiors are stored either in the Global Descriptor Table(GDT) or in the Local Descriptor Table(LDT)
Each segment Descriptor consists of the following fields:
A 32-bit base field that contains the linear address of the first byte of segment
A G granularity flag: if it is cleard ,the segment size is expressed in byte ; otherwise,it is expressed in multiples of 4096 bytes
A 20-bit limit field that denotes the segment length int bytes ,if G is set to 0 ,the size of a non-null segment may vary between 1 byte and 1 mb otherwise,it may vary between 4kb and 4gb
An S system flag : if it is cleared ,the segment is a system segment that stores kernel data structures;otherwise,it is a normal code or data segment.
A 4-bit Type filed that characterises the segment type and its access rights.
the following segment Descriptor type are widely used.
Code Segment Descriptor
Date Segment Descriptor
Task State Segment Descriptor(TSSD)
indicates that the segment Descriptor refers to a Task State Segment, that is a segment used to save the contents of the processer registers,
it can appear only in the GDT.The corresponding Type filed has the valus 11 or 9 depending on whether the corresponding process is currently executing on the CPU,The S flag of such descriptors is set of 0
Local Descriptor Talbe Descriptor(LDTD)
Each Segment Selector includes the folllowing fileds :
A 13-bit index that identifies the corresponding Segment Descriptor entry contained in the GDT or in the LDT
A TI flag that specifies whether the segment descriptor is include in GDT(TI=0) or LDT(TI=1)
An RPL(requestor provilege levle)2-bit field ,which is prcisely the current privilege level of cpu when the corresponding segment selector is loaded into cs register
The first entry of GDT is always set to 0:this ensure that logical address with an null segment selector will be considered invalid,thus cauing a processor exception.
the maximum number of segment descriptors that can be stord in the GDT is thus 8191,that is 2**13-1
a logical address is translated into a corresponding linear address segment unit performs the following operations:
Examines the TI field of the segment selector ,in order to determine which descriptor table stores the segment descriptor this field indicate that
descriptor is either in the GDT or in the LDT
Computes the address of the segment Descriptor from the index field of the segment selector the index field is muttiplied by 8,and the result is added to the content of the gdtr or ldtr register
Adds to the base fileld of the segment descriptor the offset of the logical address ,thus obtains the linear address.